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Slava Shpilman

Slava Shpilman

Validation manager at proteanTecs

Princeton, New Jersey

Experience and expertise in ASIC and FPGA Design flows:
• Build µArchitecture and code RTL (or integrate IP) against architecture requirements
• Build and implement working flows, methods and techniques to improve product quality and time to market
• Build test-benches (System-Verilog, SVA) for RTL development and sanity check (Module-level, Chip-level, GL)
• Build tests (Assembler, C, Verilog)
• Generate, run and debug regressions runs (Csh and Perl Scripting)
• Run linting/design-rules tools, analyze and debug results targeting zero-bugs at RTL release
• Analyze and improve PPA (performance, power and area), timing, functional coverage and code coverage
• Build and run synthesis targeting ASIC or FPGA, analyze and debug reports (TCL, Csh, Perl)
• Improve design, debug and run-time productivity working with scripting tools and infrastructure teams
• Interaction with other teams: P&R, Analog, Verification, CAD, Validation, Architecture, Marketing and more
• Run signoff tools, analyze and debug results
• Support Post Silicon validation and bring up (laboratory, production testers etc.)

Experience in Design-For-Test (DFT):
• Support of MBIST strategy, insertion and validation
• Support of full chip SCAN insertion
• ATPG reports analyses and coverage improvements
• DRC run, analysis and debug
• Pattern count reduction
• Test vectors simulation and debug on RTL and post silicon failure debug at ATE testers

• Core L2/L3 Cache (multi-thread, multi-core, multi-chip memory coherence)
• On chip AMBA AXI-4 interconnect (including ACE)
• CMOS Digital Image Processing: Demosaic, EDOF, Sharpening/Blurring, Despeckle and much more.
• Deep understanding of Image sensors technologies
• MIPI CSI-2 protocol (Design TX from scratch, Integrating TX/RX, validation post-silicone at LAB)


  • Senior VLSI Engineer (Tessera )
  • Senior VLSI Engineer (TransChip)
  • Validation Manager (proteanTecs)
  • Senior VLSI Engineer (PrimeSense)
  • Senior VLSI Engineer (Toga Networks)


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