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Sulakshana (Suzie) P.

Sulakshana (Suzie) P.

Engineering Manager at Intel Corporation

Santa Clara, California

Technology and Leadership experience in successful delivery of complex systems in design verification. Lead cross-functional teams with diverse technical backgrounds. Ability to identify and solve technical issues. Strong interpersonal and communication skills.

Technical Skills :
System Verilog, Verilog, Vera, Shell scripting(perl, tcl), PLI/DPI, C, C++, Assembly Programming, FPGA, Computer Architecture, Memory design, Cache coherency, Networking applications(switches, links), Scan, MBIST, Logic BIST, Boundary Scan, DFT, P1500.
Tools: - Synopsis VCS, Novas, Altera, Xilinx, UVM, VMM methodology, SVA


  • Principal Hardware Verification Engineer (Oracle Corporation)
  • Senior Design Verification Engineer (Intel Corporation)
  • Senior Hardware Verification Engineer (Sun Microsystems)
  • Engineering Manager, Design Verification (Intel Corporation)
  • Senior Manager, Hardware Design Verification (Oracle)
  • Manager, Hardware Design Verification (Oracle)


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