Some of my Tech-Talks:
1. US LLVM-Developers Conference 2019. 'Improving TableGen Descriptions'
2. Euro-LLVM 2018. "Scalar Evolution De-mystified".
3. US-LLVM Dev Conference 2017, "Writing Great Machine Schedulers" " />
Some of my Tech-Talks:
1. US LLVM-Developers Conference 2019. 'Improving TableGen Descriptions'
2. Euro-LLVM 2018. "Scalar Evolution De-mystified".
3. US-LLVM Dev Conference 2017, "Writing Great Machine Schedulers" " />

Improver

Contact Details

E-mails & Phone

Dr. Javed Absar

Dr. Javed Absar

Compiler Engineer (Machine Learning) at Graphcore

Greater Cambridge Area

I did my PhD from IMEC (Belgium) in Compilers. I have 15 US Granted Patents and 15+ International Journals and Conference Papers. I co-authored Springer Series Book "Ultra Low-Power Domain-Specific Instruction Set Processors" and won Gold Medal in Singapore National Super Computing Contest. I also did an MBA (2005-2007) from Vlerick Business School (No. 3 in Europe). Since graduating from NTU, Singapore, in 1997, I have now worked with a number of leading industry names - ARM (Cambridge, UK), AMD (Bangalore, India), Samsung (Bangalore, India), ST-Ericsson (Bristol, UK) and STMicroelectronics (Singapore).

Some of my Tech-Talks:
1. US LLVM-Developers Conference 2019. 'Improving TableGen Descriptions'
2. Euro-LLVM 2018. "Scalar Evolution De-mystified".
3. US-LLVM Dev Conference 2017, "Writing Great Machine Schedulers"


Experience:

  • Staff Compiler Engineer (ARM)
  • Member of Software Team (Machine Learning Compiler) (Graphcore)
  • Principal Member of the Technical Staff (Advanced Micro Devices)
  • BT, WLAN, WiMAX - System Architect (ST-Ericsson, U.K.)
  • Chief Engineer (Samsung India Software Operations)

Skills:

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