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Kevin Timmons

Kevin Timmons

ASIC Verification Engineer at EXOR Consulting

Glasgow, Scotland

Specialties :
I have a total of 22 years experience in Front End Digital Design /Verification and Synthesis of ASIC’s for Network Processors, Digital Tuners, Mobile Devices(Mixed Signal) which Include Power Management and Audio Processor applications and Set Top Box products and FPGA’s for Military applications.
My main skill sets are working with Mixed Signal/Digital ASIC or FPGA design which involves Writing Block Specifications, Writing RTL Code using VHDL/Verilog, System C Modeling, Writing Block Test Specifications, Writing Testbenches in HDL(VHDL or Verilog), Writing test environments in PERL, C, S C++, Specman ,System Verilog,Verilog, Writing Tests, ASIC Verification process. Synthesis from RTL Design to gate level netlist. Static Timing Analysis, Formal Verification, Also got an interest in presenting information and teaching.

Tools and Languages:
VHDL, Verilog, System Verilog, Verilog A, Specman, C, C++, Assembly, Perl, Unix, Tcl, Modelsim, NCSim, Synopsys VCS
Synopsys Design Compiler, Formality, Spyglass,Vplanner,Natural Docs,Denali
Working knowledge of most Word-processing/office tools packages Word, Excel,Powerpoint, Visio FrameMaker


Experience:

  • Senior Digital Design/Verification Engineer (Wolfson Microelectronics Edinburgh)
  • EXOR Consulting - Director of small consultancy specialising in Microchip Design & Verification (Self-employed)
  • Digital Design/Verification Engineer (ST Microelectronics)
  • ASIC Design Engineer(Contract) (SCI - WORX)
  • Digital Design Engineer(Contract) (Glasgow University)

Skills:

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