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Noam Winer

Noam Winer

SOC RTL Digital designer and functional safety

Zikhron Ya‘aqov, Haifa

• Hands-on SOC RTL FE Digital designer, Architect and Technical leader
• Multidisciplinary skills: Logic design, Functional safety ( FMEDA ) , IP integration, BE, floorplan, timing integration, clock, reset, spyglass power, design methodology, mix digital\analog, package and board design.
• HW design/Arch low-power CPU, power/performance, power delivery, Voltage regulator, power gating and battery life, spyglass power.
• Full ASIC development cycle (from definition, RTL design, integration, to mass-production)
• Strong technical background, self-starter, innovative, and creative.

Principal Eng in High Freq integrated Voltage Regulator (FIVR). Power Delivery System Eng.


  • Digital design and unit lead for intel core Pentium CPU. (Intel Corporation)
  • CAD Software Engineer (Intel Corporation)
  • VLSI design Lead in Intel CPU Design (Intel Corporation)
  • Leading Digital/Analog design feature in CPU SOC (Intel Corporation)
  • Full Chip Timing Lead in Server CPU (Intel Corporation)
  • Design RTL digital design and timing closer - Pentium 4 proc (Intel Corporation)
  • SOC RTL design and functional safety (CEVA, Inc.)


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