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Satinderjit Singh

Satinderjit Singh

Technical Program Manager at Intel Corporation

San Francisco Bay Area

- Manage circuit designers and layout designers
- Cross functional work with other teams to resolve any showstoppers and keep project on track.
- Manage delivery of High Speed and Low Power Memory Compilers

High Speed and Low Power Memory Circuit Design
Logic Verification, Timing and Power Characterization
Power and Signal Reliability Analysis
Define and Deploy Design Methodologies for Memory compilers

ESPCV, STAR-RC, QRC, XPS, Finesim, HSIM, XA, SPECTRE, HSPICE, DRC, LVS, Voltus IR, EM, DesignSync, Github, LSF, Python, csh, awk, Perforce

Design Capture, Extraction, Margin analysis, Timing and Power characterization, IR and EM analysis, Functional checks, Circuit check, DRC, LVS, DFM


  • SOC Design Eng Manager (Intel Corporation)
  • Technical Program Manager (Intel Corporation)
  • Senior Design Engineer (Artisan Inc)
  • Engineering Manager / Principal Design Engineer (Arm)
  • Silicon Architecture Engineer (Intel Corporation)


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